Modern forms of main memory are conventionally based on dynamic random access (“DRAM”) technology. While DRAM offers many advantages over other types of memory, its cost, form factor, power requirements and thermal characteristics can be unacceptable for certain classes of devices, among them certain portable or low cost devices. Examples of devices where cost, form factor, power requirements and thermal characteristics can be at-issue include cell phones, personal data assistants (PDAs) and many other forms of portable or special purpose systems. It is desired to have memory design alternatives that are less expensive, more portable or that facilitate longer battery lifespan.
Flash memory is one form of memory that meets these criteria; flash memory, however, presents several limitations that have conventionally restricted its use. One such limitation is that flash memory is usually erased or programmed in units of “blocks” or “pages,” each consisting of multiple memory cells. Due to variations in the erase and program times of individual memory cells, such devices often suffer from variable erase and program delays that vary from memory-location-to-memory-location. The requirement of mass-programming or erasing of units of memory renders it difficult to predict programming or erasing completion times, which conventionally inhibits use of flash memory in some applications. For example, in main memory applications where data and instruction turnover can be high, the time delays associated with memory transactions can present difficult scheduling issues. These limitations among others have inhibited widespread use of flash memory in some applications.
What is needed is a way of addressing variable delays associated with flash memory and associated scheduling issues. Ideally, if memory transaction times could be managed in a manner that is predictable, flash memory could be applied to a much broader range of applications; one could thereby conceivably improve power characteristics and improve the pricing of many classes of digital devices. To provide one example, if one could better manage the variability of these delays, one could potentially facilitate widespread application of flash memory to main memory applications, and thereby facilitate lower cost, smaller and more portable general purpose computing platforms.